ZX Interface Z - The Hardware, part 1

Hardware is simple, right?

Getting hardware right is not easy, and often involves several iterations, each one fixing issues found in previous versions, or adding new features to improve product value and perception. This iterative process takes time, and has an associated cost. However, producing a product without prototypes and without physically testing the design is a recipe for failure.

Expansion cards for ZX Spectrum have been tipically proprietary, and in some cases obscure due to usage of programmable devices, such as PALs. This new interface being developed is fully open-source, both hardware (PCB designs and FPGA design) and software (both internal software as well as ROMs meant to be executed by the ZX Spectrum).

The hardware for ZX Interface Z is now at revision 2.3. This will not be the last revision of the hardware, though. The current stable version is 2.2r1, which is a revision 2.2 board with a physical patch to support using the external RAM directly by the ZX Spectrum.

Now that things are stable on the hardware side, it's time to go and take a look at it. This blog post will use data from the rev. 2.3 board design.

We will look at the expansion connector and the power supply. The other parts of the design will be explained in further blog posts.

The expansion connector

All ZX Spectrum data goes through the expansion connector, as well as power to the ZX InterfaceZ. This connector has 2.54mm pitch, double sided, with a "notch" to prevent mis-insertion.

 

A multitude of lines are used to interface the two systems. Not all of the lines present on the connector are used, and some lines have different meanings and behaviour depending on the ZX Spectrum model. 

These lines can be split into several classes. For the lines we use, we have:

  • Power supply lines (+5V, +9V, GND)
  • Z80 Data bus lines (D0 to D7, 8 lines in total)
  • Z80 Address bus lines (A0 to A15, 16 lines in total)
  • Z80 Control lines (INT, NMI, MREQ, IORQ, RD, WR, WAIT, M1, RFSH, RESET)
  • Z80 Clock (CK)
  • ROM control lines (ROMCS, ROMCS2, 2AROMCS)
  • ULA control lines (IORQULA)

The power lines are mostly used to drive the power supply and the voltage converters. 

The Z80 data and addess lines are used to interface to the FPGA (we will look at these later)

The CK, MREQ, IORQ, RD, WR, M1 and RFSH lines are only sampled and sent to the FPGA, so they cannot be manipulated. 

A series of 3 NOT gates with open-drain outputs are used to drive INT, NMI and WAIT signals that go into Z80. Those gates are driven directly by the FPGA.

The other 3 NOT gates, also directly driven by the FPGA, are used to force the IORQULA, ROMCS, ROMCS2 and 2AROMCS lines high, using four P-Channel MOSFETS (note that for U$7T1 and U$7T2 the same NOT gate drives two MOSFETs). The principle is rather simple, let's look at how IORQULA works: when the NOT gate input (IC13D) is low, the output of the gate is floating. This causes the MOSFET U$2T1 gate to be at +5V, due to resistor R42. Since the potential between the source (+5V) and gate (+5V) is very low (zero), the MOSFET is off and no current flows through it. When the NOT gate input is high the output of the gate is forced to ground, forcing the MOSFET gate to 0V, causing a potential between the source and the gate of -5V. This is more than enough for the MOSFET to turn ON, placing the IORQULA line at same potential than +5V, hence forcing it to be high [this is possible due to design of the ZX Spectrum board, do not try do do this with regular signals!].

For the reset signal, a simple MOSFET driven by the FPGA is enough to trigger a Z80 reset when requested.

Power supply

One of the most important parts of any electronic design is the power supply. It needs to generate all required voltages with the desirable stability and noise, while providing the necessary current on all of those voltage rails.

The design of the ZX Interface Z requires 4 (four!) voltage supplies. The +5V supply is used for interfacing with the ZX Spectrum expansion slot, since all digital signals there use 5V logic. The FPGA used by the system (Intel Cyclone IV) requires +1.2V for the internal FPGA logic, and an additional +2.5V supply for some other FPGA internal components. The main processor module (ESP32) requires +3.3V, which is also required by the FPGA to use for the input/output pins.

The +5V supply is sourced directly from the ZX Spectrum. The 2.5V supply is generated from this +5V supply using an LDO regulator. The other voltages (+1.2V and +3.3V) are generated using switch-mode step-down converters, which are more efficient. 

However, the input voltage for the step-down converters differs from ZX Spectrum models. The required currents on the +1.2V and +3.3V are high, and cannot be sourced from a 16/48K/+2(128K) model +5V line, because that would put excessive stress on the ZX Spectrum 5V regulator (the 7805 integrated circuit which is connected to the ZX Spectrum dissipator). So, for these models, the +1.2V and +3.3V are sourced from the +9V line, which comes directly from the ZX Spectrum power supply "brick".



On the above image you can see all of the power supplies. The IC6 regulator generates the +3.3V voltage, and the IC5 generates the 1.2V voltage. The input to these regulators comes from the +9V line when present, otherwise sourced from the +5V line - since only +2A and newer models fail to include the 9V line, and due to diode D1 operation, it is guaranteed that we source current from the correct source. Both IC5 and IC6 enable pins are connected to the +5V line - in case the ZX Spectrum 7805 fails, then the power supplies will be disabled, removing power from the board. IC8 is the LDO for +2.5V, which sources from the +5V line, and only enables after the +3.3V line is up and running.

Additionally, a voltage divider consisting of R44, R26 and R46 provides a sensing voltage that goes into the ESP32, so we can see which voltage is being used to power the board. C60 is connected and placed near ESP32 to act as a holdup capacitor, since the ESP32 current can go beyond 500mA when WiFi is transmitting.

What's next?

We looked at the expansion connector and the power supply. On next blog posts, we will look in detail into these areas of the hardware:

  • Buttons and LEDs
  • Debugging and the USB-Serial programmer
  • SD Card 
  • Expansion slot
  • ESP32 module
  • Voltage level converters
  • FPGA (*)
  • USB Host
  • SDRAM (memory)

(*) For the FPGA also a series of blog posts will explain in detail what goes around inside. Which is a lot. Quite a lot.

Hope you enjoyed. Please leave any comments here or on the facebook page at https://www.facebook.com/zxinterfacez.

Alvie

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